Design of a Novel Reversible Multiplier Circuit Using HNG Gate in Nanotechnology

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INTRODUCTION
One of the major goals in VLSI circuit design is
reduction of power dissipation. As demonstrated by R.
Landauer in the early 1960s, irreversible hardware
computation, regardless of its realization technique,
results in energy dissipation due to the information loss
[1]. It is proved that the loss of each one bit of
information dissipates at least KTln2 joules of energy
(heat), where K=1.3806505x10-23m2kg-2K-1 (joules
Kelvin-1) is the Boltzmann’s constant and T is the
absolute temperature at which operation is performed
[1]. Reversible logic circuits have theoretically zero
internal power dissipation because they do not lose
information. Hence,. In 1973, Bennett showed that in
order to avoid KTln2 joules of energy dissipation in a
circuit, it must be built using reversible logic gates [2].



MATERIALS AND METHODS
Reversible logic: An n-input n-output function F is
said to be reversible if there is a one-to-one
correspondence between the inputs and the outputs.
Therefore, the input vector can be uniquely determined
from the output vector.
Reversible logic gates: An nxn reversible gate can be
represented as:
IV = (I1,I2,I3,…,In)
OV = (O1,O2,O3,…,On)
Where IV and OV are input and output vectors
respectively. Several reversible logic gates have been
proposed in the past years. Between them are: Feynman
gate, FG [8], Toffoli gate, TG [9], Fredkin gate, FRG
[10], Peres gate, PG [11], New Gate, NG [12], TSG
gate, TSG [6], MKG gate, MKG [13] and HNG gate,
HNG [15]. In this section we review these reversible
logic gates. Some of them are presented to allow for
comparison with existing studies.


CONCLUSION
In this paper, we presented a novel 4x4 bit
reversible multiplier circuit using HNG gates and Peres
gates. Table 2 demonstrates that the proposed reversible
multiplier circuit is better than the existing designs in
terms of hardware complexity, number of gates,
garbage outputs and constant inputs. Furthermore, the
restrictions of reversible circuits were highly avoided.
Our proposed reversible multiplier circuit can be
applied to the design of complex systems in
nanotechnology. All the proposed circuits are
technology independent since quantum logic and
optical logic implementations are not available.