data transfer schemes in 8085 pdf
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data transfer schemes in 8085 pdf

Abstract

Data Transfer Techniques: Interfacing Memories and I/Os

1. Mention the two broad categories in which data transfer schemes are classified?

Ans. The data transfer schemes are broadly classified into two categories. These are

* Programmed data transfer

* Direct Memory Access (DMA) transfer.

2. Mention the types of programmed data transfer.

Ans. Programmed data transfer scheme is sub-divided into the following:

* Synchronous mode of data transfer,

* Asynchronous mode of data transfer and

*Interrupt driven mode of data transfer.

3. What are the features of programmed data transfer scheme?

Ans. In this scheme, data transfer takes place under the control of a program which resides in the main memory of the system. It is relatively slow and applied for cases when the number of bytes of data is small. This scheme is suitable for relatively slow peripherals.

4. Explain with the help of a block diagram, a typical programmed data transfer scheme.

For an input from or an output to a peripheral device, an I/O instruction is issued to a device decoder which therefore selects the corresponding multiplexer (for input) or demultiplexer (for output) respectively. The peripheral is tested for its readiness by means of a F/F. When the peripheral is ready, data from the peripheral goes to the accumulator of microprocessor or vice-versa for input or output peripherals respectively.

Since peripherals are usually slower than microprocessors, data are usually latched from the bus before actually handed over to the peripheral via the demultiplexer.

5. Mention and clarify the functions needed for peripheral interfacing.

Ans. The important functions are: buffering, address decoding, command decoding and timing and control.

Buffering is necessary to increase drive and also to synchronise data exchange between the microprocessor and peripheral.

A particular I/O is selected with the help of address decoding.

Command decoding is needed for some special I/Os that perform jobs other than data

transfers—e.g. rewinding a tape drive.

For coordinating the above three, timing and control is needed.

6. In how many categories the interfacing peripherals are classified. Ans. The interfacing peripherals are classified into two categories:

* General purpose peripherals.

*Special purpose peripherals.

7. Give some examples of general purpose and special purpose peripherals. Ans. Examples of some general purpose peripherals are:

* Input/output ports

* Programmable Interrupt Controller (PIC)

*Programmable interval timer

* Programmable communication interface

* Programmable DMA interface

* Multipurpose programmable device.

While some of the special purpose peripherals are:

* Programmable CRT controller

*Programmable floppy disk controller

* Programmable keyboard and display interface.

8. Why it is relatively easy to interface memories than I/O devices? Elaborate.

Ans. It is relatively easy to interface a memory with a processor because memories are usually manufactured with the same technology as those of the CPUs and they are compatible to the CPUs with regard to speed and electrical compatibility.

But when an I/O device is interfaced with a processor, the following incompatibilities may arrive. These are:

* Speed incompatibility.

* Format incompatibility.

* Electrical characteristic incompatibility.

The first incompatibility arises because in many cases the I/O devices are slower than the processor so that a situation may arise when the processor is in a position to accept data but the peripheral, because of its slow nature, is unable to provide valid data.

The second incompatibility may arise if a 12-bit or 16-bit ADC or DAC is tried to be interfaced with an 8-bit microprocessor like 8085.

The third incompatibility may be due to current or voltage incomparability or both. Thus if a 12 V relay is to be driven by the SOD pin of 8085—both incompatibilities would be there. First the voltage (5 V) from the SOD pin is to be boosted to 12 V and also the current required to drive the relay should be provided. Thus it needs buffering.

9. Discuss the synchronous mode of data transfer.

Ans. Synchronous mode of data transfer is performed for peripherals whose timing characteristics is precisely known. In this mode the status of the device is not checked before undertaking any data transfer, that means, the device is assumed to be ready when data transfer takes place. This scheme is simplest amongst all the methods and minimum overhead in terms of hardware/software is needed to implement this scheme.
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