Channel Coding For High-Speed Links: A Systematic Look at Code Performance and System
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Presented by:
Natasa Blitvic

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Abstract

While channel coding is a standard method of improving a system’s energy efficiency in digital communications, its practice does not extend to high-speed links. Increasing demands in network speeds are placing a large burden on the energy efficiency of high-speed links and render the benefit of channel coding for these systems a timely subject. The low error rates of interest and the presence of residual intersymbol interference (ISI) caused by hardware constraints impede the analysis and simulation of coded high-speed links. Focusing on the residual ISI and combined noise as the dominant error mechanisms, this paper analyzes error correlation through concepts of error region, channel signature, and correlation distance. This framework provides a deeper insight into joint error behaviors in high-speed links, extends the range of statistical simulation for coded high-speed links, and provides a case against the use of biased Monte Carlo methods in this setting. Finally, based on a hardware test bed, the performance of standard binary forward error correction and error detection schemes is evaluated, from which recommendations on coding for high-speed links are derived.

Introduction

The practice of constraining the data stream in order to mitigate the effects of the communication channel on the received signal, commonly referred to as channel coding, is a fundamental technique in digital communications that is responsible for some of the most dramatic improvements in the modern communication standards. While channel coding is employed in most of today’s communication systems, both wireless and wireline, in order to improve on the speed/reliability/ energy efficiency of the system, the technique remains unexploited in a ubiquitous class of communication systems, namely the high-speed backplane and chip-to-chip interconnects. More than just a question of unharvested potential, the increasing network speeds place a large burden on high-speed links, which fail to keep up with the scaling trends. The under lying problem is the bandwidth-limited nature of the backplane communication channel, exacerbated by severe complexity and power constraints.
Despite several recent efforts the topic of channel coding for high-speed links remains largely unexplored due to a lack of suitable analysis and simulation frameworks. The residual intersymbol interference (ISI), coupled with noise and other circuit impairments, significantly obscures the performance picture and renders both the theoretical and computational approaches more arduous. Specifically, the channel memory introduces error correlation in the received symbol stream, regardless of whether the latter is constrained or unconstrained. The code performance is determined by the joint symbol error statistics and, as the task of accurately accounting for the error correlation due to channel memory is combinatorial in nature, exact expressions are computationally intractable. The problem of estimating the performance of a coded high-speed page link is further exacerbated by the low error rates of interest , which render direct Monte Carlo simulation prohibitive and strain the accuracy of common approximations.


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if you download the pdf file in first post, you can find out more details. and please visit the below thread too

http://studentbank.in/report-coding-and-...le-channel
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