BUSES
#1

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various input/output devices are connected to a cpu by groups of lines are called buses
Classification of buses
(1) Address bus
(2) Data bus
(3)Control bus
The address bus carries the address of a memory location or i/o device that the cpu want to access.
When an address is sent by the cpu,all devices connected to the cpu through the address bus receive this address but only that device will respond which has also received chip enable signal from the cpu.
The address bus is an unidirectional bus
It is also called as A bus
The width of the address bus is decided by the designed memory addressing kepability of the cpu .ex:intel 8085 an 8 bit mp, has 16 bit address which gives 2^16 =64k byte
The data bus is also called as D-bus
The data bus is a bi- directional bus
The data bus is use d to transfer data between the processor Memory and i/o devices
The width of the data bus is same as the word length of the cpu .ex:An 8 bit microprocessor 8-bit data bus,32 bit processor has 32-bit data bus so on.
The control bus is used to carry necessary control signals between the cpu and memory and i/o devices.examples of control signals are RD,WR,IO/M etc.the micro processor issues IO/M signal to indicate wheather it will communicate with an i/o device or memory.
if IO/M signal is high, cpu wants to communicate with I\O Device or memory
if IO/M signal is low , the cpu wants to communicate with memory.
When the cpu sends a low RD signal, the activated devices understand that the cpu wants to read information.
When the cpu sends a low RD, the activated devices under stand that the cpu wants to read information.
When the cpu sends a low WR signal , the activated device understands that the cpu will perform write operation it will send the data.
The control bus does not run as a group of wires on the mother board only those control signals which are becessary for a particular device, run from the cpu to that device
All units are connected to one bus.
The bus can be used for only one transfer at a time by two end-units that participates in that transfer.
Merits
low cost
flexibility for attaching new devices.
Peripherals can be moved between computer systems that use the same bus standard.
Demerits
it creates a communication bottleneck
When I/O must pass through a single bus, the bandwidth of that bus can limit the maximum I/O throughput.
The maximum bus speed is also largely limited by:
(a) The length of the bus.
(b) The number of I/O devices on the bus.
© And the need to support a wide range of devices with a widely varying latencies and data transfer rates.
faster solution than one bus organization
general purpose registers are connected to both buses.
two operand operation can fetch both operands at same clock cycle.
An additional buffer register may be needed to hold the output of ALU, when the two buses are busy.
Here is an example using two buses where multiple I/O buses tap into the processor-memory bus via bus adaptors.
The Processor-memory bus is used mainly for processor-memory traffic while the I/O buses are used to provide expansion slots for the I/O devices.
increased cost
two or more transfers at a time
more concurrency in operations
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