[attachment=10917]
Bus System
The System Bus
u a bus is a collection of wires on which electrical signals pass between components in the system
u the system bus connects the various components of the computer
u the 80x86 family has three major busses
 address bus
 data bus
 control bus
System Bus
Bus Types
u Data bus – moves data among computer system components.
u Address bus – carries the bits of a memory address.
u Control bus – carries, commands, command responses, status codes and similar messages.
Interconnection: the bus
u Conceptually, a collection of parallel wires, each of which is dedicated to carrying one of
 data
 address
 control (of access to the bus)
u Only one component can “write” to a particular wire of the bus at a time
Classification
u 8-bit expansion bus
u 16-bit ISA bus
Micro channel architacture
u Extended ISA Bus (EISA)
u VESA Local Bus (VLB)
u Peripheral Component Interconnect (PCI)
u USB (Universal Serial Bus)
u PCMCIA
Elements of bus design
u Type
u Method of Arbitration
u Timing
u Bus Width
u Data Transfer Type
Type
u Dedicated
u Multiplexed
u Method of Arbitration
u Centralized
u Distributed
u Timing
u Synchronous Timing
u Asynchronous Timing
u Synchronous Timing
u Asynchronous Timing
50 lines
u Bus Data Transfer Types
u Read
u Write
u Read-modify-write
u Read-after-write
u Block
u PCI
Futurebus
u Synchronous and Asynchronous Bus
u Synchronous Bus:
 Includes a clock in the control lines
 A fixed protocol for communication that is relative to the clock
 Advantage: involves very little logic and can run very fast
Disadvantages:
 Every device on the bus must run at the same clock rate
 To avoid clock skew, they cannot be long if they are fast
u Asynchronous Bus:
 It is not clocked
 It can accommodate a wide range of devices
 It can be lengthened without worrying about clock skew
 It requires a handshaking protocol
Advantages of Buses
u Versatility:
 New devices can be added easily
 Peripherals can be moved between computer
systems that use the same bus standard
u Low Cost:
 A single set of wires is shared in multiple ways
u Manage complexity by partitioning the design
Disadvantage of Buses
u It creates a communication bottleneck
 The bandwidth of that bus can limit the maximum I/O throughput
u The maximum bus speed is largely limited by:
 The length of the bus
 The number of devices on the bus
 The need to support a range of devices with:
 Widely varying latencies
 Widely varying data transfer rates
Summary
u There are 3 major components
 the CPU
 I/O
 memory
u Data travels between the CPU, I.O devices and memory on the system bus.
Summary
u The three major buses are
 address bus
 data bus
 control bus
u The number of data lines on the data bus determines the size of a processor,.
u The size of the data which the processor can handle internally on the CPU does not affect the size of that CPU.