ARM Instruction Set

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ARM REGISTERS:
ARM has load-store architecture: data operands must first be loaded into the CPU, and then stored back to main memory to save the results. It has 16 general-purpose registers, r0 through r15. Except for r15, they are identical. The r15 register has the same capabilities as the other registers, but it can also be used as a program counter (PC).
The other important basic register is the current program status register (CPSR). This register is set automatically during every arithmetic, logical, or shifting operation. The top 4 bits hold the following information of that operation:
• The Negative (N) bit is set when the result is negative in two’s-complement arithmetic.
• The Zero (Z) bit is set when every bit of the result is zero.
• The Carry © bit is set when there is a carry out of the operation.
• The Overflow (V) bit is set when an arithmetic operation results in an overflow.


ARM INSTRUCTIONS:
The major assembly instructions for data operations are summarized in the annex. They allow arithmetic, logical and shift/rotate operations, as well as comparison, and data moving and loading. The shift/rotate operations are considered as additional operands to the previous operation.