21-02-2011, 09:53 AM
ARM architecture
Brief history of ARM
• ARM is short for Advanced Risc Machines Ltd.
• Founded 1990, owned by Acorn, Apple and VLSI
• Known before becoming ARM as computer manufacturer
Acorn which developed a 32-bit RISC processor for it’s own
use (used in Acorn Archimedes)
Why ARM here?
• ARM is one of the most licensed and thus widespread
processor cores in the world
• Used especially in portable devices due to low power
consumption and reasonable performance (MIPS / watt)
• Several interesting extensions available or in development like
Thumb instruction set and Jazelle Java machine
ARM
• Processor cores: ARM6, ARM7, ARM9, ARM10, ARM11
• Extensions: Thumb, El Segundo, Jazelle etc.
• IP-blocks: UART, GPIO, memory controllers, etc
ARM architecture
• ARM:
• 32-bit RISC-processor core (32-bit instructions)
• 37 pieces of 32-bit integer registers (16 available)
• Pipelined (ARM7: 3 stages)
• Cached (depending on the implementation)
• Von Neuman-type bus structure (ARM7), Harvard (ARM9)
• 8 / 16 / 32 -bit data types
• 7 modes of operation (usr, fiq, irq, svc, abt, sys, und)
• Simple structure -> reasonably good speed / power consumption ratio
ARM7 internals
ARM core modes of operation:
• User (usr): Normal program execution state
• FIQ (fiq): Data transfer state (fast irq, DMA-type transfer)
• IRQ (iqr): Used for general interrupt services
• Supervisor (svc): Protected mode for operating system support
• Abort mode (abt): Selected when data or instruction fetch is aborted
• System (sys): Operating system ‘privilege’-mode for user
• Undefined (und): Selected when undefined instruction is fetched
ARM7 register set
• Register structure depends on mode of operation
• 16 pieces of 32-bit integer registers R0 - R15 are available in
ARM-mode (usr, user)
• R0 - R12 are general purpose registers
• R13 is Stack Pointer (SP)
• R14 is subroutine Link Register
• Holds the value of R15 when BL-instruction is executed
• R15 is Program Counter (PC)
• Bits 1 and 0 are zeroes in ARM-state (32-bit addressing)
• R16 is state register (CPSR,Current Program Status Regist
download full report
http://tisu.it.jyu.fi/embedded/TIE345/lu..._3_ARM.pdf