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Introduction
The zero-cross family of optically isolated triac drivers is an inexpensive, simple and effective solution for interface applications between low current dc control circuits such as logic gates and microprocessors and ac power loads (120, 240 or 380 volt, single or 3-phase). These devices provide sufficient gate trigger current for high current, high voltage thyristors, while providing a guaranteed 7.5 kV dielectric withstand voltage between the line and the control circultry. An integrated, zero-crossing switch on the detector chip eliminates current surges and the resulting electromagnetic interference (EMI) and reliability problems for many applications. The high transient immunity of 5000 V/μs, combined with the features of low coupling capacitance, high isolation resitance and up to 800 volt specified V DRM ratings qualify this triac driver family as the ideal page link between sensitive control circuitry and the ac power system environment. Optically isolated triac drivers are not intended for stand alone service as are such devices as solid state relays. They will, however, replace costly and space demanding discrete drive circuitry having high component count consisting of standard transistor optoisolators, support components including a full wave rectifier bridge, discrete transistor, trigger SCRs and various resistor and capacitor combinations. This paper describes the operation of a basic driving circuit and the determination of circuit values needed for proper implementation of the triac driver. Inductive loads are discussed along with the special networks required to use triacs in their presence. Brief examples of typical applications are presented.
Construction
The zero-cross family consists of a liquid phase EPI, infrared, light emitting diode which optically triggers a silicon detector chip. A schematic representation of the triac driver is shown in Figure 1. Both chips are housed in a small, 6-pin dual-in-line (DIP) package which provides mechanical integrity and protection for the semiconductor chips from external impurities. The chips are insulated by an infrared transmissive medium which reliably isolates the LED input drive circuits from the environment of the ac power load. This insulation system meets the stringent requirements for isolation set forth by regulatory agencies such as UL and VDE.
The Detector Chip
The detector chip is a complex monolithic IC which contains two infrared sensitive, inverse parallel, high voltage SCRs which function as a light sensitive triac. Gates of the individual SCRs are connected to high speed zero crossing detection circuits. This insures that with a continuous forward current through the LED, the detector will not switch to the conducting state until the applied ac voltage passes through a point near zero. Such a feature not only insures lower generated noise (EMI) and inrush (Surge) currents into resistive loads and moderate inductive loads but it also provides high noise immunity (several thousand V/μs) for the detection circuit.

Electrical Characteristics
A simplified schematic of the optically isolated triac driver is shown in Figure 2. This model is sufficient to describe all important characteristics. A forward current flow through the LED generates infrared radiation which triggers the detector. This LED trigger current (I FT ) is the maximum guaranteed current necessary to latch the triac driver and ranges from 5 mA for the MOC3063 to 15 mA for the MOC3061. The LED's forward voltage drop at I F = 30 mA is 1.5 V maximum. Voltage-current characteristics of the triac are identified in Figure 3. Once triggered, the detector stays latched in the "on state" until the current flow through the detector drops below the holding current (I H ) which is typically 100 μA. At this time, the detector reverts to the "off" (non-conducting) state. The detector may be triggered "on" not only by I FT but also by exceeding the forward blocking voltage between the two main terminals (MT1 and MT2) which is a minimum of 600 volts for all MOC3061 family members. Also, voltage ramps (transients, noise, etc.) which are common in ac power lines may trigger the detector accidentally if they exceed the static dV/dt rating. Since the fast switching, zero-crossing switch provides a minimum dV/dt of 500 V/μs even at an ambient temperature of 70 C, accidental triggering of the triac driver is unlikely. Accidental triggering of the main triac is a more likely occurrence. Where high dV/dt transients on the ac line are anticipated, a form of suppression network commonly called a "snubber" must be used to prevent false "turn on" of the main triac. A detailed discussion of a "snubber" network is given under the section "Inductive and Resistive Loads." Figure 4 shows a static dV/dt test circuit which can be used to test triac drivers and power triacs. The proposed test method is per EIA/NARM standard RS-443. Tests on the MOC3061 family of triac drivers using the test circuit of Figure 4 have resulted in data showing the effects of temperature and voltage transient amplitude on static dV/ dt. Figure 5 is a plot of dV/dt versus ambient temperature while Figure 6 is a similar plot versus transient amplitude.
Basic Driving Circuit
Assuming the circuit shown in Figure 7 is in the blocking or "off" state (which means I F is zero), the full ac line voltage appears across the main terminals of both the triac and the triac driver. When sufficient LED current (I FT ) is supplied and the ac line voltage is below the inhibit voltage (V INH in Figure 3), the triac driver latches "on." This action introduces a gate current in the main triac triggering it from the blocking
Test Procedure
Turn the D.U.T. on, while applying sufficient dV/dt to ensure that it remains on, even after the trigger current is removed. Then decrease dV/dt until the D.U.T. turns off. Measure RC , the time it takes to rise to 0.63 HV, and divide 0.63 HV by RC to get dV/dt
state into full conduction. Once triggered, the voltage across the main terminals collapses to a very low value which results in the triac drive output current decreasing to a value lower than its holding current, thus forcing the triac driver into the "off" state, even when I FT is still applied. The power triac remains in the conducting state until the load current drops below the power triac's holding current, a situation that occurs every half cycle. The actual duty cycle for the triac drive is very short (in the 1 to 3 μs region). When I FT is present, the power triac will be retriggered every half cycle of the ac line voltage until I FT is switched "off" and the power triac has gone through a zero current point. (See Figure 8). Resistor R (shown in Figure 7) is not mandatory when R L is a resistive load since the current is limited by the gate trigger current (I GT ) of the power triac. However, resistor R (in combination with R-C snubber networks that are described in the section "Inductive and Resistive Loads") prevents possible destruction of the triac drive in applications where the load is highly inductive. Unintentional phase control of the main triac may happen if the current limiting resistor R is too high in value. The function of this resistor is to limit the current through the triac driver in case the main triac is forced into the non-conductive state close to the peak of the line voltage and the energy