02-08-2011, 04:24 PM
A Flexible Platform for Hardware-Aware Network Experiments and a Case Study on Wireless Network Coding
ABSTRACT
In this paper, we present the design and implementation of a
general, flexible hardware-aware network platform which takes
hardware processing behavior into consideration to accurately
evaluate network performance. The platform adopts a networkhardware
co-simulation approach in which the NS-2 network
simulator supervises the network-wide traffic flow and the SystemC
hardware simulator simulates the underlying hardware
processing in network nodes. In addition, as a case study, we
implemented wireless all-to-all broadcasting with network coding
on the platform. We analyze the hardware processing behavior
during the algorithm execution and evaluate the overall
performance of the algorithm. Our experimental results demonstrate
that hardware processing has a significant impact on the
algorithm performance and hence should be taken into consideration
in the algorithm design. We expect that this hardwareaware
platform will become a very useful tool for more accurate
network simulations and optimal designs of processingintensive
applications.
Keywords: Network simulation, co-simulation, hardware behavior,
hardware-aware, network coding, broadcasting, wireless
network.
I. INTRODUCTION
As network capability is improved by new technologies in
terms of bandwidth, latency and services, many emerging applications,
such as video-on-demand services and voice-over-IP,
are now running on networks. Such applications put tremendous
demand on network resources and also pose challenges on
hardware to process a large volume of traffic at a high speed.
In the meanwhile, more and more sophisticated network algorithms,
such as header compression, packet aggregation and encryption,
are introduced into network protocols to improve network
performance, which greatly increases the complexity of
hardware processing as well. Although complex hardware processing
may be necessary to realize certain network functions,
it has a significant impact on network latency, bandwidth and
power consumption. This effect may vary among different hardware
and network configurations. In general, computational resource
limited network devices, including many mobile devices,
are more prone to be affected by such complex processing. As a
result, hardware-aware algorithm designs and designated hardware
components may be required for such devices to optimize
the overall performance of the network system. However, traditional
network performance evaluation tools usually do not
Research supported by NSF grant numbers ECCS-0801438 and ECS-
0427345 and ARO grant number W911NF-09-1-0154.
posses hardware-aware capability and it is difficult to use such
tools to identify hardware performance bottleneck. Thus, a platform
with hardware awareness is needed to study the effect of
hardware processing in networks.
Currently, most network algorithms are developed, validated
and evaluated by either simulation or emulation. Simulators,
generally focusing on network traffic and packet transmissions,
provide limited modeling capability for hardware processing.
In particular, processing functions are implemented at software
level and the hardware behavior is usually simplified as a fixed
delay. Such modeling is apparently inadequate and inaccurate
when the processing is complex and unpredictable, leading to
disparity in network performance evaluation. Alternatively, emulators
perform real-time simulations by modeling the nodal
processing and network transmissions using physical computers
and network systems, thus they can obtain more accurate results
on the behavior and performance of the simulated network.
In traditional network emulators, the nodes in the simulated
network are represented by actual computers on a one-to-one
or one-to-many mapping. In the case of one-to-one mapping,
where each network node occupies one computer or network
device, the processing is performed in hardware. Although this
is the most realistic network environment, the network size is
constrained by the number of hardware systems, thus the emulation
for very large networks is not feasible. In the case of oneto-
many mapping, one or more network nodes are simulated as
virtual nodes in one computer system, allowing certain scalability
on the network size. However, since many virtual nodes
share the same hardware utility, such as CPU or memory, hardware
processing may not be realistically simulated. Besides,
in both cases, the hardware systems used to represent network
nodes have fixed hardware configuration and little hardware reconfigurable
ability, which does not allow emulators to examine
network performance under different hardware conditions.
Moreover, some emulations may require certain expensive computational
resources, which may not be always available or affordable.
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