3D INTRGRATED CIRCUITS FULLREPORT
#1

PRESENTED BY:
SHAMITH MANOHAR

[attachment=12901]
WHAT IS A 3D IC ?
• In electronics, a three-dimensional integrated circuit (3D IC, 3D-IC, or 3-D IC) is a chip in which two or more layers of active electronic component are integrated both vertically and horizontally into a single circuit. The semiconductor industry is hotly pursuing this promising technology in many different forms.
Motivation For 3D IC Design
• INTERCONNECT LIMITED VLSI PERFORMANCE
• Interconnect structures increasingly consume more of the power and delay budgets in modern design.
• Plausible solution: increase the number of “nearest neighbors” seen by each transistor by using 3D IC design
• Smaller wire cross-sections, smaller wire pitch and longer lines to traverse larger chips increase RC delay. RC delay is increasingly becoming the dominant factor
PHYSICAL LIMITATIONS OF Cu INTERCONNECTS
• At 250 nm Cu was introduced alleviate the adverse effect of increasing interconnect delay.130 nm technology node, substantial interconnect delays will result.
• 3-D INTEGRATION (3D NOC).
• Offers an opportunity to continue performance improvements using CMOS technology-Higher integration density.Thus overcoming the barrier of interconnect scaling
3D ARCHITECTURE
• The 3D chip design technology can be exploited to build SoCs by placing circuits with different voltage and performance requirements in different layers.
• The 3D integration can reduce the wiring ,thereby reducing the capacitance, power dissipation and chip area and therefore improve chip performance.
• Additionally the digital and analog components in the mixed-signal systems can be placed on different Si layers thereby achieving better noise performance due to lower electromagnetic interference between such circuits blocks.
• From an integration point of view, mixed-technology assimilation could be made less complex and more cost effective by fabricating such technologies on separate substrates followed by physical bonding.
AREA AND PERFORMANCE ESTIMATION OF 3D ICs
• Rent’s Rule
• 2-D AND 3-D WIRE-LENGTH DISTRIBUTIONS
• ESTIMATING 2-D AND 3-D CHIP AREA
• TWO ACTIVE LAYER 3-D CIRCUIT PERFORMANCE
• EFFECT OF INCREASING NUMBER OF SILICON LAYERS
• EFFECT OF INCREASING THE NUMBER OF METAL LAYERS
• OPTIMIZATION OF INTERCONNECT DISTRIBUTION
CHALLENGES FOR 3-D INTEGRATION
• Thermal Effects dramatically impact interconnect and device reliability in 2D circuits
• Due to reduction in chip size of a 3D implementation, 3D circuits exhibit a sharp increase in power density
• Analysis of Thermal problems in 3D is necessary to evaluate thermal robustness of different 3D technology and design options.
• Heat generated arises due to switching
• In 2D circuits we have only one layer of Si to consider
Reply

Important Note..!

If you are not satisfied with above reply ,..Please

ASK HERE

So that we will collect data for you and will made reply to the request....OR try below "QUICK REPLY" box to add a reply to this page
Popular Searches: moneypad fullreport, microcontroller based wireless voting machine pic 16f877a fullreport, magnetic levitation fullreport, about 5g technology fullreport, radio network controller fullreport, fullreport on vehicle robot, fullreport in news of sakal paper 27 1,

[-]
Quick Reply
Message
Type your reply to this message here.

Image Verification
Please enter the text contained within the image into the text box below it. This process is used to prevent automated spam bots.
Image Verification
(case insensitive)

Possibly Related Threads...
Thread Author Replies Views Last Post
  Embryonics Approach Towards Integrated Circuits computer science crazy 3 2,866 21-03-2015, 10:46 PM
Last Post: Guest
Tongue Distributed Integrated Circuits Computer Science Clay 1 1,868 13-11-2012, 12:39 PM
Last Post: seminar details
  DIGITAL CIRCUITS & LOGIC DESIGN seminar class 1 3,862 22-10-2012, 02:17 PM
Last Post: seminar details
Photo Embryonics Approach Towards Integrated Circuits Computer Science Clay 4 3,462 05-04-2011, 02:12 PM
Last Post: arpita kulkarni
  Design of Analog Integrated Circuits by Using Genetic Algorithm Wifi 0 887 08-10-2010, 08:15 PM
Last Post: Wifi

Forum Jump: