SHIFT REGISTER BASED DATA TRANSPOSITION COST EFFECTIVE DCT

Abstract:- This paper presents a cost-effective 2-D-discrete cosine transform (DCT) architecture based on the fast row/column decomposition algorithm. We propose a new schedule for 2-D-DCT computing to reduce the hardware cost. With this approach, the transposed memory can be simplified using shift-registers for the data transposition between two 1-D-DCT units. A special shift cell with MOS circuit is designed by using the energy transferring methodology. The memory size can be great ....etc

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SUBMITTED BY:
ANKUSH GOYAL


Introduction
A linear feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state. The only linear function of single bits is xor, thus it is a shift register whose input bit is driven by the exclusive-or (xor) of some bits of the overall shift register value.
The initial value of the LFSR is called the seed, and because the operation of the register is deterministic, the stream of values produced by the register is completely dete ....etc

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Abstract:
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